Digital computing systems, in particular integrated circuit computing systems, commonly have the ability to enter a low power mode during which time no processing is accomplished and various subsystems are shut down to reduce power consumption. It is common to provide that the occurrence of predetermined external events will "awaken" the system from its low power mode to resume normal processing.
U.S. Pat. Nos. 4,758,559 and 4,758,945, both assigned to the assignee of the present invention, disclose aspects of a digital computing system which responds to particular software instructions by entering one of two available low power modes. The described system is available as an integrated circuit designated the MC146805 from Motorola, Inc. of Austin, Tex. Either of the two available low power modes disclosed can be terminated by a reset or interrupt event. In the case of interrupt events the mask bit, which prevents certain interrupts from being recognized by the system, must be cleared in order that a maskable interrupt event will terminate the low power mode.
The above-mentioned patents describe a system which is well suited to traditional "hand-packed" integrated circuit design methodology. However, as integrated circuit computing systems move toward "modular" design methodologies in order to permit more rapid design of customized systems, some reset and interrupt control circuits may be removed from close logical and physical proximity to the central processing unit. In this case, the previously known techniques for terminating a low power mode require modification.